In the semiconductor industry, the use of radio frequency (RF) driven plasma chambers for manufacturing silicon wafers is commonplace. There exists a common need within such applications to monitor the sheath voltage, and specifically how the sheath voltage relates to the direct current (DC) bias potential of the wafer itself. The following acronyms are used throughout this application: Radio Frequency (RF), Direct Current (DC), Digital Signal Processor (DSP), Field Programmable Gate Array (FPGA) and Complex Programmable Logic Device (CPLD).
Currently, there are several techniques to ascertain wafer potential, as well as sheath and bulk plasma potential. With respect to the wafer DC bias potential, one monitoring method includes measuring the self-bias voltage of the wafer by detecting the leakage current between the wafer and the electrostatic chuck (ESC) while varying an applied DC voltage to the ESC. While this technique is used within some current production settings, the computed value is highly dependent upon the magnitude of the leakage current, which is coupled to the type of ESC in the system. The method of detecting leakage current through the wafer to the ESC is also highly dependent upon different types of backside wafer films.
Another method for ascertaining the wafer bias potential is through the use of silicon carbide pins attached to the outer edge of the ESC and in contact with the plasma. However, such pins are consumables and have to be replaced frequently within production environments.
A third method for detecting the DC bias on the wafer is through a RF voltage probe at the ESC and a signal processing unit which computes the wafer voltage from the peak to peak RF voltage. This method provides a means for detecting the wafer DC bias voltage without a probe in direct contact with the plasma by scaling the RF voltage at the ESC to a DC value through the use of a calibrated gain and offset. This method assumes a purely linear relationship to the RF peak to peak voltage and the DC potential of the wafer which is not the case for multi-frequency plasmas. FIG. 1 shows the correlation of wafer bias to RF Vpp. In FIG. 1, when a linear fit is applied, the R-squared value is significantly less than one [e.g., R-sq: 0.90].